| 摘要 |
A self-aligned (i.e., spatially selective) process for fabricating a corrosion-resistant conductive pad on a substrate, and an associated structure that includes an interconnect to allow a terminal connection to the conductive pad (e.g., a chip-to-package connection). The conductive pad may include a metal such as copper, aluminum, or tungsten. Examples of a relevant interconnect include a wirebond interconnect and a controlled collapse chip connection (C4) interconnect. The self-aligned process generates a metallic layer on an initially exposed metal layer, wherein the metallic layer is electrically conductive and corrosion resistant. The metallic layer includes an alloy or an unalloyed metal. The metal layer may include copper. The process may be accomplished by providing a substrate having a metal layer with an exposed surface, depositing a second metal layer on the exposed surface, annealing the substrate to alloy a portion of the metal layer that includes the exposed surface and a portion of the second metal layer, and removing the unalloyed portion of the second metal layer. An alternative process may be accomplished by providing a metal layer on the substrate, and electroless plating a corrosion-resistant metal or a corrosion-resistant alloy on the metal layer. The preceding alternative process may additionally include electroless plating a second corrosion-resistant metal on the corrosion-resistant metal or corrosion-resistant alloy. After the corrosion-resistant conductive pad is formed, the interconnect is attached to the conductive pad.
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