发明名称 HIDDEN JOB START PREPARATION IN AN INSTRUCTION-PARALLEL PROCESSOR SYSTEM
摘要 <p>The read latency caused by job start preparation of a future job is at least partly hidden within the current job by reading information for job start preparation of the future job integrated with the execution of the current job. Instructions for job start preparation are preferably instrumented (701) into the current job and executed (702), whenever possible, in parallel with the instructions of the current job. The integrated job start preparation may include table look-ups, register file updating, instruction fetching and preparation. If the scheduled job order is allowed to change during execution, it is typically necessary to test (703) whether the next job is still valid before starting the execution, it is typically necessary to test (703) whether the next job is still valid before starting the execution of the next job and take appropriate actions (704; 705, 706) dpending on the outcome of the test. In addition to reduced job start preparation time, unused slots in the instruction-parallel execution of the current job may be filled up by the added read instructions, thus providing more efficient utilization of the multiple functional execution units of the processor.</p>
申请公布号 WO2003032154(A1) 申请公布日期 2003.04.17
申请号 SE2001002183 申请日期 2001.10.08
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