A leadframe (4) for a semiconductor package (22) is disclosed. The leadframe (4) has a plurality of tie bars (12) defining a perimeter of the leadframe (4). The leadframe (4) has a plurality of leads (10) inwardly extending from an associated tie bar (12). The leads (10) has circuit board mounting surfaces (15) aligned in a common mounting plane. Each of the mounting surfaces (15) being spaced from the tie bars (12). Each lead has a recessed surface (21) adjacent an associated tie bars (12). The recessed surface (12) is misaligned from the mounting surface such that during singulation of the leadframe (4) burrs extending from the recessed surface (21) do not cross the mounting plane.
