| 摘要 |
PURPOSE: A method for fabricating a capacitor is provided to increase capacitance by enlarging a surface area of a dielectric layer. CONSTITUTION: An interlayer dielectric(35) and the first etch stop layer(36) are formed on a semiconductor substrate(31). The first contact hole is formed by patterning the first etch stop layer(36) and the interlayer dielectric(35). A plug(39) is formed thereon. The first sacrificial layer(41) is formed on the first etch stop layer(36) and the plug(39). The second etch stop layer is formed on the first sacrificial layer(41). The first amorphous silicon layer(47) is formed on the second etch stop layer. The second sacrificial layer is formed on the second etch stop layer. The second amorphous silicon layer is formed on the first amorphous silicon layer(47) and the second sacrificial layer. The first amorphous silicon layer(47) and the second amorphous silicon layer are changed into the first and the second polysilicon layers(53,55) by performing a thermal process. A hemispherical grain(57) is formed on the first and the second polysilicon layers(53,55). A lower electrode(59) is formed by doping dopants into the first and the second polysilicon layers(53,55).
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