发明名称 |
Fast decision threshold controller for burst-mode receiver |
摘要 |
<p>A repetitive burst-mode input signal that has a dark time portion, a preamble portion, and a payload portion is converted into a limited output signal in accordance with a decision threshold level, which is controlled by selectively coupling an averaged value of the burst-mode data amplitude to the decision threshold level. The timing sequence for selectively coupling the averaged signal value is controlled such that the average value of the burst-mode signal acquired during the preamble portion of the burst-mode signal is applied to the decision threshold level during substantially all of the payload portion. The control circuit may incorporate a phase-locked loop, which locks onto the repetitive dark time frequency and in response synthesizes a switchable track enable signal that controls the timing sequence of the decision threshold level. The phase-locked loop can employ all-digital, analog, and/or hybrid digital/analog circuitry. <IMAGE></p> |
申请公布号 |
EP1303063(A2) |
申请公布日期 |
2003.04.16 |
申请号 |
EP20020256886 |
申请日期 |
2002.10.03 |
申请人 |
CHIARO NETWORKS LTD. |
发明人 |
BREWER, TONY M.;DAVIES, CHRISTOPHER P.;MCDERMOTT III, THOMAS C.;ROZMAN, ALLEN F. |
分类号 |
H04B10/158;(IPC1-7):H04B10/158 |
主分类号 |
H04B10/158 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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