| 发明名称 |
Method of fabricating trench for SOI merged logic DRAM |
| 摘要 |
Methods of forming merged logic DRAM devices on silicon-on-insulator (SOI) wafers having a relatively thick buried oxide region, where deep trenches are etched into the SOI substrate without etching through the buried oxide layer are provided. The methods of the present invention provide high performance SOI merged logic DRAM devices.
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| 申请公布号 |
US6548345(B2) |
申请公布日期 |
2003.04.15 |
| 申请号 |
US20010765560 |
申请日期 |
2001.01.19 |
| 申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
HAKEY MARK CHARLES;MA WILLIAM HSIOH-LIEN |
| 分类号 |
H01L21/76;H01L21/762;H01L21/8242;(IPC1-7):H01L21/824 |
主分类号 |
H01L21/76 |
| 代理机构 |
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