发明名称 GENERAL MEMORY SYSTEM FOR EMULATOR
摘要 PROBLEM TO BE SOLVED: To provide the design of a verification circuit not aware of memory capacity by effectively utilizing the memory resource of a memory device. SOLUTION: This memory system comprises the general memory device 1, a storage device 4 storing the data of the verification circuit 5, an emulator 2 installed between the general memory device 1 and the storage device 4. The general memory device 1 comprises a control circuit 8 and a plurality of memories 7. The verification circuit 5 comprises a plurality of memory blocks 6. The control circuit 8 comprises a memory collating circuit 12. The memory collating circuit 12 performs the collation of the plurality of memory blocks 6 with the plurality of memories according to a specified rule and, based on the collation, sorts and stores the plurality of memory blocks 6 into the plurality of memories 7. Such a rule forms an order to automatically store the plurality of memory blocks in the plurality of memories in an order inevitably determined so as to be stored so that the design of a large scale LSI can be performed unconsciously and design time can be surely shortened. Thus the design of the verification circuit not aware of the memory capacity can be provided by effectively utilizing the memory source of the memory device.
申请公布号 JP2003108401(A) 申请公布日期 2003.04.11
申请号 JP20010297637 申请日期 2001.09.27
申请人 NEC CORP 发明人 ORII KEN
分类号 G06F11/22;G06F12/02 主分类号 G06F11/22
代理机构 代理人
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