WAFER LEVEL LAMINATED CHIP PACKAGE AND MANUFACTURING METHOD THEREOF

摘要

PROBLEM TO BE SOLVED: To provide a wafer level laminated chip package where a semiconductor devices manufactured at a wafer level are stacked three-dimensionally, and to provide a method for manufacturing the wafer level laminated chip package. SOLUTION: First, second, and third semiconductor devices 60a, 60b and 60c manufactured at a wafer level are stacked three-dimensionally to a rewiring board where a wiring layer for rearranging the chip pad of the semiconductor devices is formed via a packed bed. The first, second, and third semiconductor devices 60a, 60b and 60c are electrically coupled by a conductive substance formed in the first, second, and third semiconductor devices 60a, 60b and 60c. After that, the stacked semiconductor devices are separated, thus obtaining a plurality of laminated chip packages 100 at the wafer level.