发明名称 |
Fabrication of semiconductor devices having high-voltage MOS transistors and low-voltage MOS transistors |
摘要 |
Methods of fabricating a semiconductor device having low-voltage MOS transistors and high-voltage metal-oxide semiconductor ("MOS") transistors are provided. The method includes forming a device isolation layer at a predetermined region of a semiconductor substrate. The device isolation layer defines first and second active regions in low and high-voltage MOS transistor regions, respectively. A capping layer pattern is formed to cover the low-voltage MOS transistor region. The capping layer pattern exposes the second active region in the high-voltage MOS transistor region. A first gate oxide layer is formed on an entire surface of the semiconductor substrate having the capping layer pattern. The first gate oxide layer is formed using a chemical vapor deposition ("CVD") technique. The first gate oxide layer serves as a gate insulating layer of the high-voltage MOS transistor. The first gate oxide layer in the low-voltage MOS transistor region and the capping layer pattern are then etched to expose the first active region. A second gate oxide layer is formed using a thermal oxidation technique on the first active region. The second gate oxide layer is formed to a thickness, which is thinner than the first gate oxide layer. The second gate oxide layer serves as a gate insulating layer of the low-voltage MOS transistor.
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申请公布号 |
US2003067050(A1) |
申请公布日期 |
2003.04.10 |
申请号 |
US20020184791 |
申请日期 |
2002.06.28 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
KIM SUNG-HOAN |
分类号 |
H01L27/092;H01L21/762;H01L21/8234;(IPC1-7):H01L21/823;H01L21/336;H01L29/00 |
主分类号 |
H01L27/092 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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