发明名称 BROADBAND PIN DIODE ATTENUATOR BIAS NETWORK
摘要 <p>Diode network configurations are disclosed in which cathode bias voltage is held substantially constant to provide an attenuator circuit in which return loss is optimized throughout a broad dynamic attenuation range. Preferred embodiments include PIN diodes arranged in a π having two attenuation control signals provided thereto. Alternative embodiments include PIN diodes arranged in a T network having two attenuation control signals provided thereto.</p>
申请公布号 WO2003030357(A2) 申请公布日期 2003.04.10
申请号 US2002031259 申请日期 2002.10.02
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