| 摘要 |
A signal compensation circuit of a bus is disclosed in the present invention, wherein the amplitude of a surge is obtained by inputting a test pattern into the bus and comparing a reference voltage and a peak-value signal filtered out from the bus. For continual correction of the damping resistance, the test pattern can be inputted into the bus repeatedly to optimize the effect of the compensation. Then, a proper damping resistor is selected and connected to the bus in series to absorb the energy of the surge. The signal compensation circuit is embedded in the chip, such as in the south bridge.
|
