| 摘要 |
<p>A display memory, a driver circuit, and a display using the driver circuit, and a cellular information apparatus capable of reducing power consumption, plotting at a high speed, and not requiring memory mapping. A display memory (7) has one bit line connected to a CPU read circuit and the other bit line connected to a display read circuit and the bit lines are both connected to a write circuit. The CPU read circuit and the write circuit are assigned for access from the CPU while the display read circuit is assigned for displaying on the display screen. Furthermore, access from the CPU and read out to the display screen are assigned for level periods having different memory clock signals and controlled independently from each other. Moreover, a drive power source of the display memory is separated, so that a drive power voltage is supplied for each memory cell or a set of memory cells of the display memory.</p> |
