发明名称 |
Gate processing method with reduced gate oxide corner and edge thinning |
摘要 |
Disclosed is a method of processing a semiconductor gate structure on a semiconductor wafer, the method comprising providing a semiconductor structure with an active device area capped with a pad oxide layer bounded by one or more isolation trenches , providing a sacrificial oxide layer by thickening said pad oxide layer to a desired oxide thickness, in using said thickened pad oxide layer as said sacrificial oxide layer for device implantation, stripping said sacrificial pad oxide layer after use, and capping said semiconductor gate with a final gate oxide layer.
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申请公布号 |
US2003067035(A1) |
申请公布日期 |
2003.04.10 |
申请号 |
US20010965919 |
申请日期 |
2001.09.28 |
申请人 |
TEWS HELMUT;GLUSCHENKOV OLEG;WEYBRIGHT MARY |
发明人 |
TEWS HELMUT;GLUSCHENKOV OLEG;WEYBRIGHT MARY |
分类号 |
H01L21/28;H01L21/762;H01L21/8234;H01L29/423;H01L29/51;(IPC1-7):H01L29/76 |
主分类号 |
H01L21/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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