发明名称 |
Buffering circuit in a semiconductor memory device |
摘要 |
A buffering circuit of a semiconductor memory device is provided with a plurality of buffers divided into groups, comprising: a first controller for generating a first enable signal in response to a refresh signal and a clock enable signal; a second controller for generating a second enable signal in response to an auto-refresh signal and the first enable signal; a first buffer block including at least one of signal input buffers controlled by the first enable signal; and a second buffer block including at least one of signal input buffers controlled by the second enable signal. The groups of the buffers are independently assigned to their corresponding enable signals.
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申请公布号 |
US6545938(B2) |
申请公布日期 |
2003.04.08 |
申请号 |
US20010886465 |
申请日期 |
2001.06.22 |
申请人 |
HYNIX SEMICONDUCTOR INC. |
发明人 |
LEE BYUNG JAE;KIM JOON HO;NAM YOUNG JUN;CHO KWANG RAE;LEE SANG KWON |
分类号 |
G11C11/409;G11C7/10;G11C11/403;G11C11/407;G11C11/408;(IPC1-7):G11C8/00 |
主分类号 |
G11C11/409 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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