发明名称 Semiconductor device and manufacturing method thereof
摘要 The interval between gate electrodes in a memory cell portion and the interval between gate electrodes in a peripheral circuit portion are set so as to have a relation with the widths of sidewall insulating films of the gate electrodes. Using an etching stopper film, first only a memory cell contact hole is selectively formed and a silicon film is filled at the bottom. As a result, an optimum electrode structure can be each provided on an n type diffusion layer in the memory cell portion and an n type diffusion layer in the peripheral circuit portion.
申请公布号 US6545360(B1) 申请公布日期 2003.04.08
申请号 US20000657839 申请日期 2000.09.07
申请人 NEC CORPORATION 发明人 OHKUBO HIROAKI;HAMADA TAKEHIKO;MATSUKI TAKEO
分类号 H01L21/28;H01L21/285;H01L21/469;H01L21/768;H01L21/8234;H01L21/8242;H01L23/522;H01L27/088;H01L27/10;H01L27/108;(IPC1-7):H01L21/469 主分类号 H01L21/28
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