发明名称 Remotely controllable phase locked loop clock circuit
摘要 This invention is a remotely controllable clock circuit embodied in a single integrated circuit device. The clock circuit includes at least one externally writable clock control register, a reference clock input, a controllable oscillator circuit, a pre-scalar circuit and a comparison circuit. The comparison circuit controlling the frequency of the controllable oscillator circuit to achieve a frequency match between a pre-scaled reference clock signal and a pre-scaled oscillator clock signal. The pre-scale divide factors are stored in respective fields in the clock control register. The clock control register may be memory mapped into a device memory space, accessed via an indirect access register or accessed via a serial scan chain. A trace first-in-first-out buffer has an input for trace data operating under the function clock signal of the operating circuits and an output operating under the oscillator clock signal.
申请公布号 US6545549(B2) 申请公布日期 2003.04.08
申请号 US20000741647 申请日期 2000.12.19
申请人 TEXAS INSTRUMENTS INCORPORATED 发明人 SWOBODA GARY L.
分类号 B29B9/06;G01R25/00;G06F1/08;G06F9/44;G06F9/455;H03B5/02;H03B5/24;H03L7/085;H03L7/099;H03L7/18;(IPC1-7):H03L7/085 主分类号 B29B9/06
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