| 摘要 |
PURPOSE: A boundary scan test system and a delay compensation method thereof are provided, which output data to a boundary scan test chip embedded in a board to check connection state of the chip, and sample data passing through the chip according to delay generated in the board or a cable. CONSTITUTION: A boundary scan test system comprises a main controller checking connection state of a boundary scan test chip by outputting a pattern signal synchronized to a clock signal with the chip and by analyzing the pattern signal passing through the chip. The main controller further includes a correction clock signal part which measures delay generated in the boundary scan test chip embedded in the board and in a signal line transmitting data to the chip and generates a corrected clock signal according to the delay.
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