| 摘要 |
PROBLEM TO BE SOLVED: To provide a level shifting circuit for stably outputting the signal of converted level even when the voltage level of a low voltage signal is lowered. SOLUTION: In the CMOS level shifting circuit, with which digital signals are inputted to the sources of N-channel transistors 15 and 16, a bias voltage Vref is inputted to the gates of the N-channel transistors 15 and 16 and the bias voltage Vref is set higher than the high level voltage of the digital signal and lower than a value, with which the threshold voltage of the N-channel transistors 15 and 16 is added to the high level voltage of the digital signal.
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