| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor memory in which a defective memory cell detected by an operation test can be relieved without requiring complex analysis processing. SOLUTION: Redundant decoders corresponding respectively to a plurality of redundant circuits RC(1)-RC(n+1) for relieving a defective memory cell respectively are classified to a priority redundant decoder 70 used preferentially and non-priority decoders 60-1 to 60-n other than it. The non-priority decoders 60-1 to 60-n activate corresponding redundant circuits when defective addresses FAD1-FADn internally stored are specified to an object of access excluding the case in which a defective address stored in the priority redundant decoder 70 coincides with an address signal ADD.
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