发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND ITS MANUFACTURING METHOD
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit device provided with a impurities buried layer for a measure to count an α-ray soft error and has an SRAM capable of being reduced in wirings for potential supply. SOLUTION: An N-well region NWEL and a P-well region PWEL built in as an intermediate layer are alternately aligned on a N-type layer B-N. An oblique line is a region used as one memory cell, and the memory cells, not shown, are integrated in an array form with the oblique line formed as a unit region. Supply of a ground potential VSS to the well region PWEL is achieved by a guard ring region GR formed at the well region PWEL. Namely, a wire for supplying the ground potential VSS is electrically connected to the guard ring region GR.
申请公布号 JP2003100904(A) 申请公布日期 2003.04.04
申请号 JP20020207064 申请日期 2002.07.16
申请人 SEIKO EPSON CORP 发明人 KUWAZAWA KAZUNOBU
分类号 H01L27/08;H01L21/761;H01L21/8238;H01L21/8244;H01L27/092;H01L27/10;H01L27/11 主分类号 H01L27/08
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