| 摘要 |
PROBLEM TO BE SOLVED: To measure accurately the setup time/hold time and the access time of an integrated memory. SOLUTION: A test signal given to the integrated memory is varied in synchronization with a test clock signal, an invalid state is set by a control signal being not synchronizing with this test clock signal, and given to the memory (3). In the memory, a signal in synchronization with the memory clock signal is taken in. In an invalid data generating circuit (6), a test signal (SGT) is modified by a non-synchronous control signal (PTX), a test signal (TEOUT) is generated and given to the memory. The period of an invalid state of this modified test signal can be adjusted, and the setup time/holding time of the signal for the memory can be measured by monitoring variation timing of this non-synchronous control signal PTX by an external tester.
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