发明名称 MASK PATTERN, EVALUATION SAMPLE MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE, AND EVALUATION METHOD FOR SEMICONDUCTOR EVALUATION SAMPLE
摘要 PROBLEM TO BE SOLVED: To enable the manufacturing of an evaluation sample easily and in a short time, to enable the execution of reliable evaluation, and to enable the easy identification of a defect. SOLUTION: Storage node contacts are formed in checkers on a silicon substrate by mask patterns 101 disposed in checkers. Thereafter, by storage node patterns 102, storage nodes are disposed on the whole surface like an ordinary cell array. The storage nodes are alternately conducted to the silicon substrate through the storage node contacts. When the evaluation sample is observed by SEM, it is seen a contrast difference by the storage node conducted to the substrate and the storage node being open.
申请公布号 JP2003100905(A) 申请公布日期 2003.04.04
申请号 JP20010291899 申请日期 2001.09.25
申请人 SONY CORP 发明人 MATOBA YOSHIHISA
分类号 H01L21/66;H01L21/8242;H01L27/108 主分类号 H01L21/66
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