发明名称 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
摘要 <p>PROBLEM TO BE SOLVED: To solve the problem that as a source electrode has an irregular shape caused by an interlayer insulating film on the gate electrode, a solder bonding layer and solder can not be applied to the whole surface of a lead and hence the bonded strength is unsatisfactory. SOLUTION: An SOG film is formed on the source electrode and etched back to bury SOG films in the recessed parts of the source electrode and the surface of the source electrode is leveled. With such a constitution, a solder bonding layer and solder are applied uniformly over the whole surface of the source electrode, so that the bonded strength between the electrode surface and a lead is enhanced.</p>
申请公布号 JP2003101024(A) 申请公布日期 2003.04.04
申请号 JP20010290750 申请日期 2001.09.25
申请人 SANYO ELECTRIC CO LTD 发明人 TOMINAGA HISAAKI;KUBO HIROTOSHI
分类号 H01L21/302;H01L21/3065;H01L21/3205;H01L21/336;H01L23/52;H01L29/78;(IPC1-7):H01L29/78;H01L21/306;H01L21/320 主分类号 H01L21/302
代理机构 代理人
主权项
地址