发明名称 VOICE DELAYING AND SYNTHESIZING CIRCUIT BY MEMORY
摘要 PROBLEM TO BE SOLVED: To provide a voice synthesizing and data delaying circuit by a memory, which performs confirmation in terms of hearing together with seeing based on the display of a display device when a circuit connection test is conducted in a portable telephone, etc. SOLUTION: A delay memory delays voice input data by the control of a CPU 20 and also delayed data is synthesized with voice synthetic data in an addition memory 17 concerning the voice delaying and synthesizing circuit. The circuit includes a means for collecting waveform data concerning a voice delay state and a synthesis state through the use of the CPU.
申请公布号 JP2003101489(A) 申请公布日期 2003.04.04
申请号 JP20010293312 申请日期 2001.09.26
申请人 ANDO ELECTRIC CO LTD 发明人 TAKABE KENSUKE
分类号 G10L19/00;G10L13/00;H03M1/12;H03M1/18;H04B17/00;H04M1/24;H04M1/725 主分类号 G10L19/00
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