| 摘要 |
PROBLEM TO BE SOLVED: To provide an input protection circuit which exhibits a high ESD (electrostatic discharge) withstand voltage and by which signals in a broad level range can be inputted. SOLUTION: An n-type well region 12 is formed on the surface of a substrate 10. A p-channel MOS transistor FT11 is formed in the region 12, and an n- channel MOS transistor FT12 is formed on the surface of the substrate 10. The FT12 may be formed in a p-type well region 36. The source of the FT11 and the gate of the FT12 are connected to an input terminal IN and the drain of the FT11 to the drain of the FT12 and the source of the FT12 and the substrate 10 to a ground Vss. In response to the + ESD input to the input terminal IN, the FT11 and the FT12 are brought into conduction. A lateral bipolar transistor BP13 may be formed with the source of the FT12 as an emitter, and the collector of the BP13 may be connected to the drain of the FT12 . The n-channel MOS transistor FT13 may be used as the BP13 .
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