| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor memory device in which an equalizing characteristic and a pre-charge characteristic of a bit line are improved while suppressing increment of area. SOLUTION: An equalizing circuit is formed by utilizing a dummy memory cell group arranged conventionally around a regular memory cell group. A bit line can be equalized by connecting a storage node of a dummy memory cell DACE connected to a bit line BL0 and a storage node of a dummy memory cell DMC2 connected to a bit line/BL0 by a wiring L1 and activating an equalizing signal BLEQ- L given to the dummy word line. |
