| 摘要 |
PROBLEM TO BE SOLVED: To provide a DMA (direct memory access) circuit incorporating a CPU peripheral device, the circuit being configured as a high-speed, low-cost and highly functional system so as to reduce a load on a CPU by writing various instructions from the CPU without the intermediary of execution by the CPU, after finishing of DMA. SOLUTION: A DMA controller 3 in a CPU peripheral device body 1 includes an automatic write control circuit 7 and an automatic write instruction storage area 6. In the DMA circuit, an interrupt signal issued at the end of DMA transfer is input into the write control circuit 7 for writing instructions within the instruction storage area 6 into a CPU peripheral device core 2. As a result this process enables the CPU to eliminate fixed instructions to be executed after the end of DMA transfer. After all the instructions within the storage area 6 have been executed, the process is interrupted into a CPU11, and the CPU11 can write a next DMA-start instruction into the CPU peripheral device.
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