| 发明名称 |
Method for fabricating gate oxides in surrounding gate DRAM concepts |
| 摘要 |
The invention relates to a vertical transistor for a DRAM memory cell, in which a deposited layer is used as a gate insulator, and this deposited layer simultaneously serves for electrical insulation between the transistor and a storage capacitor.
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| 申请公布号 |
US2003062562(A1) |
申请公布日期 |
2003.04.03 |
| 申请号 |
US20020247967 |
申请日期 |
2002.09.20 |
| 申请人 |
GOEBEL BERND;MOLL PETER;SEIDL HARALD |
发明人 |
GOEBEL BERND;MOLL PETER;SEIDL HARALD |
| 分类号 |
H01L21/8242;(IPC1-7):H01L27/108 |
主分类号 |
H01L21/8242 |
| 代理机构 |
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