发明名称 Method for improving processor performance
摘要 Methods for improving processor performance. Specifically, by reducing some of the latency cycles within a host controller, request processing speed can be improved. One technique for improving processing speed involves initiating a deferred reply transaction before the data is available from a memory controller. A second technique involves anticipating the need to transition from a block next request (BNR) state to a bus priority request (BPRI) state, thereby eliminating the need to wait for a request check to determine if the BPRI state must be implemented.
申请公布号 US2003065844(A1) 申请公布日期 2003.04.03
申请号 US20010967155 申请日期 2001.09.28
申请人 LESTER ROBERT A.;CHIN KENNETH T.;BLOCKER JIM;LARSON JOHN E.;JONES PHILLIP M.;RAWLINS PAUL B. 发明人 LESTER ROBERT A.;CHIN KENNETH T.;BLOCKER JIM;LARSON JOHN E.;JONES PHILLIP M.;RAWLINS PAUL B.
分类号 G06F13/00;G06F13/16;G06F13/36;(IPC1-7):G06F13/00 主分类号 G06F13/00
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