发明名称 High-speed discharge-suppressed D flip-flop
摘要 A high-speed D flip-flop includes first and second precharge circuits, and first to fifth switching circuits. The first precharge circuit precharges first and second internal nodes to a first supply voltage in response to a clock signal, and the first switching circuit provides a first discharge path between the first internal node and a third internal node in response to an input signal. The second switching circuit provides a second discharge path between the second and third internal nodes in response to a potential of the first internal node, and the second precharge circuit precharges an output terminal to a first supply voltage in response to a potential of the second internal node. The first switching circuit provides a third discharge path between the output terminal an the third internal node in response to the potential of the second internal node, and the fourth switching circuit connects the first to third discharge paths with a second supply voltage in response to the clock signal.
申请公布号 US2003062941(A1) 申请公布日期 2003.04.03
申请号 US20020228870 申请日期 2002.08.26
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 KIM SOO-WON;SONG MYOUNG-SU
分类号 H03K19/096;(IPC1-7):H03K3/037 主分类号 H03K19/096
代理机构 代理人
主权项
地址