| 摘要 |
The present invention is in the area of memory architecture. More particularly, the present invention provides a method, apparatus, machine-readable medium, and system reduce leakage current in memory. Embodiments may take advantage of the reverse bias characteristic of circuit elements, such as the reverse gate-to-source bias characteristic of a transistor, within the memory to limit leakage and provide for a leakage tolerant data storage technique. Embodiments may also enable the reverse bias characteristic of circuit elements, such as the reverse gate-to-source bias characteristic of a transistor, to be taken advantage of by sourcing charge from data storage elements.
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