发明名称 Method, memory system and memory module board for avoiding local incoordination of impedance around memory chips on the memory system
摘要 A signal line of a data bus includes first wires on a first board and a second wire on a second board. The second board is installed on the first board to connect the first and second wires with each other in series to establish the signal line. Semiconductor devices are connected with the second wire. In such data bus system, impedance of the second wire is decided according to additional capacitance of the semiconductor device on the second board in order to harmonize impedance of the first board with impedance of the second board.
申请公布号 US2003062966(A1) 申请公布日期 2003.04.03
申请号 US20020255987 申请日期 2002.09.26
申请人 ELPIDA MEMORY, INC. 发明人 ABO HISASHI;IKEDA HIROAKI
分类号 G06F3/00;G06F12/00;G06F13/16;G11C5/00;G11C5/06;H01L27/10;H05K1/02;H05K1/14;(IPC1-7):H01P5/00 主分类号 G06F3/00
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