发明名称 Memory array employing integral isolation transistors
摘要 A memory, includes memory array disposed in an isolated well of semiconductor material and including a plurality of storage cells, each storage cell being accessible via one of a plurality of bit lines; a set of isolation transistors disposed in the isolated well of semiconductor material, each transistor having one of a source and drain coupled to a respective one of the bit lines of the memory array; and a sense amplifier disposed in semiconductor material outside the isolated well of semiconductor material and being coupled to the other of the source and drain of the respective isolation transistors.
申请公布号 US2003062556(A1) 申请公布日期 2003.04.03
申请号 US20010967007 申请日期 2001.09.28
申请人 TERLETZKI HARTMUD;SCHUETZ ALFRED;WEAVER SELWYN RHYS 发明人 TERLETZKI HARTMUD;SCHUETZ ALFRED;WEAVER SELWYN RHYS
分类号 G11C7/06;G11C11/4091;(IPC1-7):H01L29/76 主分类号 G11C7/06
代理机构 代理人
主权项
地址