Identifying and synchronizing permuted channels in a parallel bit error rate tester

摘要

A test systemÄ10, 25Ü that includes a generatorÄ12, 22Ü and an analyzerÄ13, 21Ü acting cooperatively to test a deviceÄ11Ü having a plurality of device communication channels. The deviceÄ11Ü has a plurality of inputs and corresponding outputs, each input being connected to a corresponding one of the outputs. The correspondence between the input and output channels may change if the deviceÄ11Ü is turned off and on or if the deviceÄ11Ü is not actively sending data from the inputs to the outputs. The test systemÄ10, 25Ü determines a mapping between the deviceÄ11Ü inputs and outputs prior to performing bit error rate testing utilizing a mapping test pattern. The test systemÄ10, 25Ü can then switch to a bit error rate test pattern without causing the deviceÄ11Ü to drift such that the correspondence between the input and output channels is lost. <IMAGE>