发明名称 LINEAR DEAD-BAND-FREE DIGITAL PHASE DETECTION
摘要 A phase-locked loop includes a phase detector, a loop filter, a voltage controlled oscillator and a frequency divider arranged such that the phase detector generates a phase detector output signal as a function of a phase difference between the reference clock signal and the feedback signal; the loop filter generates a frequency control signal from the phase detector output signal; the voltage controlled oscillator generates a phase-locked loop output signal that has a frequency that is controlled by the frequency control signal; and the frequency divider generates the feedback signal from the phase-locked loop output signal. The phase-locked loop further includes one or more circuit elements that maintain an operating point of the phase detector such that, for a predetermined range of both positive and negative phase differences between the reference clock signal and the feedback signal, the output signal is generated as a substantially linear function of the phase difference between the reference clock signal and the feedback signal.
申请公布号 EP1297619(A2) 申请公布日期 2003.04.02
申请号 EP20010953155 申请日期 2001.05.21
申请人 TELEFONAKTIEBOLAGET L M ERICSSON (PUBL) 发明人 MATTISSON, SVEN;HAGBERG, HANS;NILSSON, MAGNUS
分类号 H03D13/00;H03L7/089;H03L7/197;(IPC1-7):H03D13/00 主分类号 H03D13/00
代理机构 代理人
主权项
地址