发明名称 Error corrector
摘要 A method and apparatus for checking errors in data. The method includes transmitting data along with parity bits to a first end of a data transmission network; generating check bits from the data as such data passes through the network; comparing the check bits with the parity bits to determine whether there has been an error generated by the network. The error detector apparatus includes: a data source for providing data. The data has a plurality of bytes, each byte having a parity bit. A first logic is provided for determining whether the parity bits have the same parity and for producing a combined parity bit representative of such determination. A check bit generator produces a plurality of check bits from the data. A second logic determines whether the produced check bits have the same logic state and produces a combined check bit representative of such determination. A third logic determines whether the combined check bit and the combined parity bit have the same logic state. The check bit generator produces the check bits in accordance with a redundancy check bit generating code, for example a modified Hamming code.
申请公布号 US6543029(B1) 申请公布日期 2003.04.01
申请号 US19990408811 申请日期 1999.09.29
申请人 EMC CORPORATION 发明人 SANDORFI MIKLOS
分类号 G06F11/10;G11B20/18;H03M13/15;(IPC1-7):G06F11/00;H03M13/00 主分类号 G06F11/10
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