发明名称 Semiconductor memory device having faulty cells
摘要 In response to a read command received by a system interface unit for accessing a plurality of blocks of data stored in said non-volatile semiconductor memory, a controller carries out selective read operations of blocks of data to two memories from the non-volatile semiconductor memory. The controller also carries out parallel operations of data transferring a first block of data, which has already been subjected to error detection and error correction operations by an error correction unit, from one of the two memories to a host system via said system interface unit and of data transferring of a second block of data to be subjected to the error detection and error correction operation, from said non-volatile semiconductor memory to the other of the two memories.
申请公布号 US6542405(B2) 申请公布日期 2003.04.01
申请号 US20020105275 申请日期 2002.03.26
申请人 HITACHI, LTD. 发明人 KATAYAMA KUNIHIRO;TAMURA TAKAYUKI;WATATANI SATOSHI;INOUE KIYOSHI;SHIOTA SHIGEMASA;NAITO MASASHI
分类号 G06F11/20;G11C7/00;G11C11/34;G11C16/06;G11C29/00;H04L12/28;(IPC1-7):G11C16/06 主分类号 G06F11/20
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