发明名称 Wiring forming method for semiconductor device
摘要 Grooves and holes of high aspect ratio are filled completely and uniformly. After forming connection holes (3) and wiring grooves (4) in a silicon oxide film (2) which is formed on a silicon substrate (1), a TiN film (5) is formed over the entire surface of the semiconductor substrate and a Ti film (6) is formed on the region except for the connection holes (3) and the wiring grooves (4). Then, in a state where the connection holes (3) and the wiring groove (4) are dipped in a plating solution, a plating treatment is carried out under a deposition overvoltage higher than the deposition overvoltage of TiN to copper and lower than the deposition overvoltage of Ti to copper. Since plating is thus applied only to the portion where the TiN film (5) is exposed, namely, only to the portion of the connection holes (3) and the wiring grooves (4), the connection holes (3) and the wiring grooves (4) are filled with copper and when they are polished by a chemical and mechanical polishing method to form wirings, satisfactory copper wiring which are uniform and well filled can be obtained.
申请公布号 US6541379(B2) 申请公布日期 2003.04.01
申请号 US20020115252 申请日期 2002.04.04
申请人 ASAHI KASEI KABUSHIKI KAISHA 发明人 TONOMURA SHOICHIRO;KUNO TOYOHIKO
分类号 H01L21/288;H01L21/768;H01L23/532;(IPC1-7):H01L21/44 主分类号 H01L21/288
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