| 摘要 |
There is disclosed a semiconductor device having: a semiconductor substrate; a first gate electrode constructed of a multi-layered stack member provided in a memory region, formed with memory cells, of a surface area of the semiconductor substrate so that the first gate electrode is insulated by a first insulating layer from the semiconductor substrate; and a second gate electrode provided in a logic region, formed with a logic circuit for controlling at least the memory cells, of the surface area of the semiconductor substrate so that the second gate electrode is insulated by a second insulating layer from the semiconductor substrate, wherein said layer, brought into contact with the first insulating layer, of the first gate electrode and the layer, brought into contact with the second insulating layer, of the second gate electrode, are composed of materials different from each other. There is also disclosed a method of manufacturing a semiconductor device by defining a memory region for providing memory cells and a logic region for providing a logic circuit for controlling the memory cells, the memory and logic regions being isolated by a device isolation region on a semiconductor substrate; providing a first insulating layer on the semiconductor substrate; selectively removing said first insulating layer existing on the logic region in a surface area of the semiconductor substrate; stacking an amorphous silicon layer on the semiconductor substrate; and effecting a thermal treatment upon the semiconductor substrate in order to alter said amorphous silicon layer existing on said memory region into a polycrystalline semiconductor layer and to alter the amorphous silicon layer existing on the logic region into a silicon monocrystalline layer.
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