发明名称 ASSOCIATIVE MEMORY CIRCUIT
摘要 PURPOSE: To provide an associative memory circuit in which high speed search operation can be performed even if the number of memory cells connected to a match line are increased. CONSTITUTION: This associative memory circuit has logic circuits Q1-Q4 in which storage contents of memory cells 101, 102, etc., are compared with retrieved data inputted from the outside and the compared result is outputted to a match line, and logic circuits of a plurality of memory cells are connected to a common match line. As the circuit has a reference potential generating circuit 22 provided for each match line and generating a reference potential, and a differential amplifier circuit 20 amplifying the difference between a potential of the match line and the reference potential and discriminating the coincidence or uncoincidence of storage contents of a plurality of memory cells and retrieved data, even if the number of memory cells connected to the match line are increased, loads of the match line are increased, and transition speed is reduced, high speed search operation can be performed.
申请公布号 KR20030026198(A) 申请公布日期 2003.03.31
申请号 KR20020009499 申请日期 2002.02.22
申请人 FUJITSU LIMITED 发明人 AIKAWA TADAO
分类号 G01N21/64;C12M1/34;C12Q1/06;G01N21/78;G01N33/53;G11C5/14;G11C15/00;G11C15/04;(IPC1-7):G11C15/00 主分类号 G01N21/64
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