| 摘要 |
<p>PROBLEM TO BE SOLVED: To reduce an on-voltage. SOLUTION: Stripe type trenches 207 in which a gate electrode 210 is buried are formed on an upper main surface of a semiconductor base body 200, and an N<+> emitter layer 206 is exposed in a ladder type on the upper main surface of the base body 200 sandwiched by the adjacent trenches 207. As a result, an emitter electrode 212 is surely in contact with the N<+> emitter layer 206 when a position of a belt type region Ra as a contact surface with the emitter electrode 212 is deviated. The ladder type N<+> emitter layer 206 is formed adjacently to the trenches 207, so that a channel region 208 is formed continuously along the trenches 207. Micronization of an element is facilitated and contributes effectively to the reduction of an on-voltage.</p> |
