发明名称 |
DEVICE AND METHOD FOR CONTROLLING DMA |
摘要 |
PURPOSE: A device and a method for controlling a DMA(Direct Memory Access) are provided to realize the fast data transfer between the external memories having variable waiting time and connecting to a processor without a bus arbitration interface for a DMA controller through a bus. CONSTITUTION: A DMA control circuit(230) comprises a plurality of DMA control circuits(231-23n) respectively allocated to a plurality of channels. A bus arbiter(220) performs the bus arbitration between the DMA control circuits(231-23n) and the processor(100). A processor interface circuit(210) converts a memory control circuit of the processor(100) into a control signal for the bus arbitration and outputs it to the bus arbiter(220). An output signal of a bus master corresponding to the DMA control circuit(231) obtaining a bus priority according to the bus occupation status information outputted from the bus arbiter(220) is transferred to the external memory(300) by a bus controller(240).
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申请公布号 |
KR20030025018(A) |
申请公布日期 |
2003.03.28 |
申请号 |
KR20010057905 |
申请日期 |
2001.09.19 |
申请人 |
ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE |
发明人 |
JUN, HYEON GYU;LEE, JAE GYEONG |
分类号 |
G06F13/28;(IPC1-7):G06F13/28 |
主分类号 |
G06F13/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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