| 摘要 |
<p>A semiconductor device such that the capacitive component while the FET is off is reduced, the insertion loss in the high-frequency band is reduced, and the isolation characteristic is improved. A semiconductor substrate comprises a buffer layer (24) containing 1010 cm-3 to 1014 cm-3 of impurities and formed on a semi-insulating semiconductor base (25) containing 1014 cm-3 to 1016 cm-3 of p- or n-type impurities and an active layer (23) containing 1015 cm-3 to 1017 cm-3 of p- or n-type impurities and formed on the buffer layer (24). On the semiconductor substrate, FETs (30a, 30b) having gate electrodes having a gate length of 0.8 µm or less are fabricated. When n FETs are combined, the drain terminal of the mth FET is connected to the source terminal of the (m+1)-th FET, resistors (41a, 41b) are connected to the gate electrodes of all the first to nth FETs, and the other ends of the resistors are connected to the same potential, where n and m satisfy the inequalities 1 ≤ m ≤ n-1 (n and m are integers, n>1).</p> |
