Semiconductor device, test method for semiconductor device, and tester for semiconductor device

摘要

The present invention comprises: a plurality of output terminals through which a signal from an internal circuit is output; buffer circuits, each provided between one of the plurality of output terminals and the internal circuit; and a delay circuit connected to the specific buffer, the delay circuit delaying the signal from the internal circuit. With this arrangement, it is possible to measure a delay time from an input test signal even when a super-high-speed device is tested.