发明名称 Soft-output decoder
摘要 To appropriately express an erasure position of a code by a small-scale, simple-structured circuit, a soft-output decoding circuit (90) in each element decoder includes a received value and a priori probability information selection circuit (154) to select an input to-be-decoded received value TSR and extrinsic information or interleaved data TEXT, whichever is necessary for soft-output decoding. Based on inner erasure position information IERS supplied from an inner erasure information generating circuit (152), the received value and a priori probability information selection circuit (154) replaces a position where no coded output exists due to puncture or the like with a symbol whose likelihood is "0". That is, the received value and a priori probability information selection circuit (154) outputs information which assures a probability in which a bit corresponding to a position where there is no coded output is "0" or "1" to be "½".
申请公布号 US2003061003(A1) 申请公布日期 2003.03.27
申请号 US20020111724 申请日期 2002.04.26
申请人 MIYAUCHI TOSHIYUKI;YAMAMOTO KOUHEI 发明人 MIYAUCHI TOSHIYUKI;YAMAMOTO KOUHEI
分类号 G06F11/10;H03M13/25;H03M13/27;H03M13/29;H03M13/39;H03M13/45;(IPC1-7):G06F17/18 主分类号 G06F11/10
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