| 摘要 |
A semiconductor memory has a memory cell array, a boosted voltage generator to generate a boosted voltage and a decoder to select memory cells in said memory cell array in response to an address signal. The voltage generator is activated in response to input of a first command, and kept active for a period of repeated input of a second command to control for the voltage generator, following the first command. The semiconductor memory may be provided with a regular operation mode in which the voltage generator is controlled to be in an active or inactive state by means of a first command signal in response to a predetermined signal, and a successive operation mode in which the voltage generator is kept active by a second command signal in response to another predetermined signal.
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