发明名称 Computer-implemented method of defect analysis
摘要 In the step (S11), chip classification data in which a plurality of chips are classified into four sorts on the basis of presence/absence of (new) defects and pass/fail (of integrated circuits) is obtained. Next, in the step (S12) set is a situation where chips are randomly extracted out of all the chips with the number of chips with defect used as random extraction number on the basis of the chip classification data obtained in the step (S11). After that, in the step (S13) obtained is the random probability of failure (P(N4)) which is a probability that the number of faulty chips included in the randomly-extracted chips should be not less than the equivalent of the number (N4) of faulty chips with defect. Thus obtained is a defect analysis method and a method of verifying chip classification data, by which the analysis result on the basis of the chip classification data can be enhanced.
申请公布号 US2003060985(A1) 申请公布日期 2003.03.27
申请号 US20020224469 申请日期 2002.08.21
申请人 MITSUBISHI DENKI KABUSHIKI KAISHA 发明人 MUGIBAYASHI TOSHIAKI;HATTORI NOBUYOSHI
分类号 H01L21/027;H01L21/66;(IPC1-7):G06F19/00 主分类号 H01L21/027
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