发明名称 Method of testing a mapping of an electrical circuit
摘要 An electrical circuit can be described with a reference model that has a plurality of states and a plurality of state transitions. Acceptable and/or unacceptable instruction sets are predefined for each state. Acceptable and unacceptable instruction sets are generated randomly in succession from the reference model and applied to a mapping of the electrical circuit for processing. By comparing the instruction sets processed by the mapping of the electrical circuit with the instruction sets determined from the reference model, conclusive information relating to the mapping of the electrical circuit is obtained.
申请公布号 US2003061582(A1) 申请公布日期 2003.03.27
申请号 US20020238819 申请日期 2002.09.10
申请人 SPIRKL WOLFGANG 发明人 SPIRKL WOLFGANG
分类号 G06F11/26;(IPC1-7):G06F17/50 主分类号 G06F11/26
代理机构 代理人
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