发明名称 Integrated memory and corresponding operating method
摘要 An integrated memory has a multiplexer and a differential sense amplifier with a differential input. The differential sense amplifier is connected to three bit lines by the multiplexer. The multiplexer electrically connects the differential input of the sense amplifier to any two of the three bit lines connected to it respectively, in accordance with its activation.
申请公布号 US6538950(B2) 申请公布日期 2003.03.25
申请号 US20010917553 申请日期 2001.07.27
申请人 INFINEON TECHNOLOGIES AG 发明人 BOEHM THOMAS;HOENIGSCHMID HEINZ;BRAUN GEORG;MANYOKI ZOLTAN;LAMMERS STEFAN;ROHR THOMAS
分类号 G11C11/401;G11C7/06;G11C7/10;G11C11/22;(IPC1-7):G11C8/00 主分类号 G11C11/401
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