| 发明名称 |
Packaging substrate comprising staggered vias |
| 摘要 |
A packaging substrate is formed with staggered vias interconnecting fan-out circuitry for improved strength and rigidity. Embodiments of the present invention include substrates wherein less than 20% of the vias are aligned.
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| 申请公布号 |
US6538307(B1) |
申请公布日期 |
2003.03.25 |
| 申请号 |
US20010772889 |
申请日期 |
2001.01.31 |
| 申请人 |
ADVANCED MICRO DEVICES, INC. |
发明人 |
VALLURI VISWANATH;FONTECHA EDWIN;LEE MELISSA SIOW LUI |
| 分类号 |
H01L23/498;(IPC1-7):H01L23/495 |
主分类号 |
H01L23/498 |
| 代理机构 |
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